Cadence Design Systems, Inc. (Nasdaq: CDNS) has unveiled a cutting-edge solution for chip designers with the introduction of Cadence Voltus InsightAI. Addressing a critical challenge faced in modern chip development, Voltus InsightAI focuses on tackling EM-IR (Electromigration and IR Drop) violations early in the design process. These violations often create productivity bottlenecks during the signoff phase, making early detection crucial.
By harnessing advanced machine learning methods for rapid incremental IR analysis, Voltus InsightAI empowers engineers to identify and resolve up to 95% of EM-IR violations before reaching the signoff stage. This capability translates into a remarkable 2X increase in productivity when closing EM-IR issues. The technology’s fast IR inferencing engine provides real-time feedback on design changes, ensuring swift decision-making and problem resolution.
Key to Voltus InsightAI is its deep learning-based IR drop diagnostics, which pinpoint the root causes of issues. By considering factors such as electrical, spatial, and timing elements, the technology offers predictive analysis during the design phase. Additionally, its multi-method fixing approach, incorporating techniques like placement, grid reinforcement, routing, and engineering change orders (ECOs), ensures precise and effective issue resolution.
Fully integrated with Cadence’s existing suite of solutions, Voltus InsightAI seamlessly fits into the chip design process. Ben Gu, Corporate Vice President of R&D, Multiphysics Systems Analysis Business Unit, Cadence, emphasized that the technology not only focuses on signoff but also on early detection and prevention of EM-IR violations. This strategic move aligns with Cadence’s Intelligent System Design approach, emphasizing excellence in System-on-Chip (SoC) design.
