Microchip’s First Single-Chip Network Synchronization Solution Provides Ultra Precise Timing for 5G Radio Access Equipment

Microchip Technology's 5G chip

Microchip Technology Inc. (NASDAQ: MCHP) introduces first single-chip, highly integrated, low-power, multi-channel integrated circuit (IC). The chip when coupled with the company’s IEEE 1588 Precision Time Protocol (PTP) and clock recovery algorithm software modules, it enables to achieve 5G performance that requires time sources to be synchronized throughout a packet-switched network ten times more accurately than 4G requirements.

 

“Our newest ZL3073x/63x/64x network synchronization platform implements sophisticated measure, calibrate and tune capabilities, thereby significantly reducing network equipment time error to meet the most stringent 5G requirements,” said Rami Kanama, vice president of Microchip’s timing and communications business unit. “A uniquely flexible architecture for implementing the necessary channel density as well as high-performance, low-jitter synthesizers help simplify the design of timing cards, line cards, Radio Units (RU), Centralized Units (CUs) and Distributed Units (DUs) for 5G Radio Access Networks (RAN).”

 

Microchip’s measure, calibrate and tune capabilities ensure 5G systems achieve International Telecommunication Union – Telecommunication (ITU-T) Standard G.8273.2 Class C (30ns max|TE|) and the emerging Class D (5ns max|TEL|) time error requirements. The architecture provides flexibility, offering up to five independent Digital Phase Locked Loop (DPLL) channels while consuming only 0.9W of power in a compact 9 x 9-millimeter package that simultaneously reduces board space, power and system complexity.

 

The five ultra-low-jitter synthesizers of the latest platform offers 100 femtosecond (fs) root mean square (rms) jitter performance required by high-speed interfaces in the latest 5G RU, DU and CU systems. This network synchronization platform software includes its ZLS30730 high-performance algorithm couple with its ZLS30930 IEEE 1588-2008 protocol engine. The company offers a graphical user interface (GUI) and evaluation board along with application notes and other design-in support tools.

 

Microchip’s extensive portfolio of timing and clock solutions include clock generation, fanout buffer and jitter attenuator solutions as well as quartz and MEMS oscillators is complemented by a broad family of Ethernet physical layer (PHY) devices.

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