Synopsys, Inc.’s (Nasdaq: SNPS) SiliconSmart library characterization solution achieves certification from TSMC for the foundry’s N5, N4 and N3 process technologies. A part of the Synopsys Fusion Design Platform, the SiliconSmart solution is equipped with needed enhancements to support cell library characterization at advanced nodes, accelerating successful digital implementation for mobile/5G, high-performance computing, artificial intelligence (AI), automotive, internet of things (IoT) networks and aerospace and defense applications.
“Certification of the SiliconSmart library characterization solution on our latest process technologies will provide our mutual customers with high confidence of achieving signoff accuracy and faster time-to-market through an accelerated path for TSMC N5, N4 and N3-based designs,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “Our longstanding collaboration with Synopsys is again supporting designers to meet the stringent power and performance requirements and quickly launch their differentiated products to market.”
Library data accuracy has become essential to model increased design complexity at advanced nodes. At the same time, the scale of library characterization has increased many-fold to hundreds of PVT corners on tens of thousands of cores. Yet, synthesis, place-and-route, verification and signoff tools count on having precise model libraries that accurately represent timing, noise and power performance of digital and memory designs.
The SiliconSmart core engine delivers comprehensive library characterization as well as quality assurance capabilities tuned to produce Synopsys PrimeTime® signoff-quality libraries. Its speed and accuracy are essential, as process variability at advanced nodes require both to model effects on timing. SiliconSmart technologies use reference SPICE engines for faster characterization of advanced Liberty™ models used by the PrimeTime static timing analysis solution to account for effects in low-voltage FinFET processes that affect timing. The solution supports advanced industry-standard models including LVF (Liberty Variation Format).
“Customers are experiencing a 3x increase in compute demand from node to node, along with greater PVT combinations challenges,” said Jacob Avidan, senior vice president, Synopsys Silicon Realization Group. “Our SiliconSmart library characterization solution with its core engine successfully provides high-quality, scalable solutions to address customers’ design challenges. This certification is a result of our continued successful collaboration with TSMC on advanced nodes to deliver accurate, high-performing technologies, which will provide our mutual customers with the performance and productivity they need along with an accelerated path to silicon production.”
