Cadence Design Systems, a renowned electronic design automation company, has joined forces with Samsung Foundry to accelerate the development of 3D-IC designs for cutting-edge applications, including hyperscale computing, 5G, AI, IoT, and mobile devices. In their expanded collaboration, Cadence is providing differentiated reference flows and package design kits based on their Integrity 3D-IC platform, aimed at streamlining the multi-die planning and implementation process.
The Integrity 3D-IC platform stands as the industry’s sole unified platform, integrating system planning, packaging, and system-level analysis within a single cockpit. Furthermore, it supports Samsung’s newly introduced 3D CODE standard, a system description language that simplifies design creation and analysis flows, offering a unified environment for designers.
Engineers often face challenges such as design analysis complexities, configuration hurdles, and thermal and power integrity issues while developing advanced package multi-die designs. To overcome these obstacles and improve productivity while reducing design turnaround time, the collaboration between Cadence and Samsung Foundry provides a comprehensive solution. The reference flows based on the Integrity 3D-IC platform offer essential capabilities, including early analysis for the power delivery network (PDN), thermal analysis, and system-level layout versus schematic (LVS) and design rule checking (DRC). Additionally, the flows incorporate Cadence Allegro X packaging technologies and multiphysics system-level analysis tools like Celsius Thermal Solver and Clarity 3D Solver, further enhancing productivity.
Sangyun Kim, Vice President of the Foundry Design Technology Team at Samsung Electronics, acknowledged the benefits of advanced packaging technologies for high-performance designs. Sangyun stated, “Customers creating high-performance designs are looking to make use of the benefits advanced packaging technologies offer, such as lower power, lower yield cost, and system performance boosts. With the introduction of our 3D CODE technology and Cadence’s comprehensive new flows, we’re providing mutual customers with the next-generation chiplet architectures required to achieve multi-die planning and implementation objectives so they can deliver high-quality products to market faster.”
Vivek Mishra, Corporate Vice President in the Digital & Signoff Group at Cadence, highlighted the competitive advantage that customers can gain through their collaboration with Samsung Foundry. Vivek emphasized, “The reference flows based on the Cadence Integrity 3D-IC platform combined with Samsung’s latest technologies provide our customers a unified design environment that simplifies the workflow and reduces multi-die planning and implementation turnaround time when creating complex 3D-IC designs.”
The collaboration between Cadence and Samsung Foundry, underpinned by the Integrity 3D-IC platform, represents a significant step towards advancing the development of innovative semiconductor solutions in today’s rapidly evolving technology landscape. With their combined expertise and focus on streamlining the design process, the collaboration is poised to drive the industry forward in delivering high-quality products with shorter time-to-market.
