Allegro DVT, a leading provider of silicon video IP solutions announces the availability of its D301, the first MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) decoder IP solution. The D301 is expected to accelerate the adoption of the new video standard by allowing SoC/ASIC vendors to rapidly offer solutions compatible with the emerging format.
MPEG-5 part 2 LCEVC (Low Complexity Enhancement Video Coding) is the latest standard by MPEG and ISO. It specifies an enhancement layer which, when combined with a base video encoded with a separate codec such as H.264/HEVC/AV1/VVC, produces an enhanced video stream. The enhanced stream provides new features such as extending the compression capability of the base codec, lowering encoding and decoding power consumption, and providing a platform for additional future enhancements.
The D301 LCEVC decoder IP is optimized for power and silicon area, making it suitable for system-on-chip (SoC) designers to easily integrate LCEVC decoding into their products. It supports picture resolution up to 8K, pixel widths from 8 to 12-bits and chroma subsampling formats ranging from 4:2:0 up to 4:4:4. The IP also features fast and easy SoC integration and is delivered with full user configurable control software.
Guido Meardi, CEO of V-Nova said: “We are very excited about Allegro DVT’s introduction of their LCEVC decoder IP. As a market leader in video silicon IPs, Allegro DVT’s product launch represents a cornerstone towards delivering the first HW enabled LCEVC decoding solutions which are key to optimizing power consumption and to supporting higher resolutions.”
Nouar Hamze, CEO of Allegro DVT added “We are proud to be the first company to offer an LCEVC decoder IP solution. Our D301 will enable our customers to integrate the new standard into their products quickly and easily, providing them with a significant competitive advantage.”
